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19-2860; Rev 0; 4/03
-QSOP 16
9m
m x 6m
High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters
General Description Features
o 6A Peak Gate-Drive Current o Up to 1.2MHz Operation o Up to 6.5V Gate-Drive Voltage o 0.5/0.95 Low-Side Drivers o Capable of 30A Output per Phase o Adaptive Shoot-Through Protection o User-Programmable Delay Time o TTL and CMOS Input Compatible o UVLO for Proper Sequencing o Flexible 2- to 8-Phase Implementation with MAX8524 and MAX8525 o Space-Saving (4.9mm 6mm) 16-Pin QSOP Package
The MAX8523 dual-phase gate driver, along with the MAX8524*/MAX8525 multiphase controllers, provides flexible 2- to 8-phase CPU core-voltage supplies. The 0.5/0.95 driver resistance allows up to 30A output current per phase. Each MOSFET driver in the MAX8523 is capable of driving 3000pF capacitive loads with only 15ns propagation delay and 11ns typical rise and fall times, allowing operations up to 1.2MHz per phase. Adaptive dead time controls low-side MOSFET turn-on, and user-programmable dead time controls high-side MOSFET turnon. This maximizes converter efficiency while allowing operation with a variety of MOSFETs and controller ICs. An undervoltage lockout (UVLO) circuit allows proper power-on sequencing. PWM_ signal inputs are both TTL and CMOS compatible. The MAX8523 is available in a space-saving 16-pin QSOP package, and specified for -40C to +85C operation.
Pentium is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
4.
m
MAX8523
Applications
Core Voltage Supplies for PentiumTM IV Microprocessors Servers and Workstations Desktop Computers Voltage Regulator Modules (VRMs) DC-to-DC Regulator Modules Switches, Routers, and Storage
PART MAX8523EEE
Ordering Information
TEMP RANGE -40C to +85C PIN-PACKAGE 16 QSOP
*Future product. Contact factory for availability.
Typical Operating Circuit
3V TO 13.2V
+4.5V TO +6.5V GATE DRIVE SUPPLY
1 2 PHASE 1 OUTPUT 3 5 6 4 13 8
BST1 DH1 LX1
VCC BST2 DH2
7 16 15 PHASE 2 OUTPUT 14 12 11 10 9 PHASE 2 PWM INPUT PHASE 1 PWM INPUT
MAX8523
DL1 PGND1 PV1 PV2 DLY LX2 DL2 PGND2 PWM2 PWM1
High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
ABSOLUTE MAXIMUM RATINGS
BST_ to PGND_ ......................................................-0.3V to +26V LX_ to PGND_............................................................-1V to +14V DH_ to PGND_..........................................-0.3V to (BST_ + 0.3V) DH_ to LX_................................................................-0.3V to +7V BST_ to LX_ ..............................................................-0.3V to +7V DL_ to PGND_.............................................-0.3V to (PV_ + 0.3V) PV_ to PGND_ ..........................................................-0.3V to +7V PGND2 to PGND1 .................................................-0.3V to +0.3V VCC to PGND1..........................................................-0.3V to +7V DLY to PGND1............................................-0.3V to (VCC + 0.3V) PWM_ to PGND1 ........................................-0.3V to (PV2 + 0.3V) VCC to PV1_..............................................................-7V to +0.3V DH_, DL_ Continuous Current .......................................200mA Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C).............667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VVCC = VPV1 = VPV2 = VBST1 = VBST2 = VDLY = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER UNDERVOLTAGE PROTECTION Supply Voltage Range UVLO IVCC IPV_ IBST_ IBST1 + IPV1 + IBST2 + IPV2 DRIVER SPECIFICATIONS DH_ Driver Resistance DL_ Driver Resistance DH_ Rise Time DH_ Fall Time DL_ Rise Time DL_ Fall Time DH_ Propagation Delay DL_ Propagation Delay PWM_ INPUT Input Current Input Voltage High Input Voltage Low VPWM_ = 0V or 6.5V 2.5 0.8 0.01 1 A V V PWM_ = PGND1, VBST = 4.5V PWM_ = VCC, VBST_ = 4.5V PWM_ = PGND1, VPV_ = 4.5V PWM_ = VCC, VPV = 4.5V PWM_ = VCC, VBST = 5V, 3nF load PWM_ = PGND1, VBST = 5V, 3nF load PWM_ = VCC, VPV = 5V, 3nF load PWM_ = PGND1, VPV = 5V, 3nF load PWM_falling, VBST = 5V PWM_rising, VBST = 5V 0.65 0.8 0.95 0.5 11 9.5 8.5 6.5 15 8 1.2 1.35 1.6 0.9 ns ns ns ns ns ns VCC rising VCC falling DLY = VCC Dynamic, RDLY = 50k PWM_ = GND PWM_ = VCC PWM_ = GND PWM_ = VCC 250kHz 4.5 3.25 3.0 50 0.5 1 1.2 0.1 1.2 4 3.5 6.5 3.8 3.5 100 1 10 2 10 2 8 V V A mA A mA A mA mA CONDITIONS MIN TYP MAX UNITS
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High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters
ELECTRICAL CHARACTERISTICS
(VVCC = VPV1 = VPV2 = VBST1 = VBST2 = 5V, VPGND1 = VPGND2 = VLX1 = VLX2 = 0V; TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER UNDERVOLTAGE PROTECTION Supply Voltage Range UVLO IVCC IPV_ IBST_ IBST1 + IPV1 + IBST2 + IPV2 DRIVER SPECIFICATIONS DH_ Driver Resistance DL_ Driver Resistance PWM_ INPUT Input Current Input Voltage High Input Voltage Low VPWM_ = 0V or 6.5V 2.5 0.8 1 A V V PWM_ = PGND1, VBST_ = 4.5V PWM_ = VCC, VBST_ = 4.5V PWM_ = PGND1, VPV_ = 4.5V PWM_ = VCC, VPV_ = 4.5V 1.2 1.35 1.6 0.9 VCC rising VCC falling DLY = VCC Dynamic, RDLY = 50k PWM_ = GND PWM_ = VCC PWM_ = GND PWM_ = VCC 250kHz 4.5 3.25 3.0 6.5 3.8 3.5 100 1 10 2 10 2 8 V V A mA A mA A mA mA CONDITIONS MIN TYP MAX UNITS
MAX8523
Note 1: Specifications at -40C guaranteed by design.
Typical Operating Characteristics
(PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA = +25C, unless otherwise noted.)
POWER DISSIPATION vs. SWITCHING FREQUENCY (BOTH DRIVERS SWITCHING)
MAX8523toc01
POWER DISSIPATION vs. CAPACITIVE LOAD (BOTH DRIVERS SWITCHING)
MAX8523toc02
DL RISE AND FALL vs. CAPACITIVE LOAD
14 12 RISE/FALL TIME (ns) 10 8 6 DL FALL 4 2 DL RISE
MAX8523toc03
800 700 600 POWER (mW) 500 400 300 200 CLS = 3nF, CHS = 1.5nF 100 VCC = 6.5V 0 0 0.2 0.4 0.6 0.8 1.0 CLS = 3nF, CHS = 3nF
800 700 FREQ = 1.2MHz 600 FREQ = 600kHz POWER (mW)
CLS = 6nF, CHS = 3nF
500 400 FREQ = 300kHz 300 200 100 0 VCC = 6.5V 0 1 2 3 4 5 6 CAPACITANCE (nF)
0 0
CDH = CDL 1 2 3 4 5 6
1.2
FREQUENCY (MHz)
CAPACITANCE (nF)
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3
High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
Typical Operating Characteristics (continued)
(PV1 = PV2 = VCC = VDLY = 5V, 3nF capacitive load, TA = +25C, unless otherwise noted.)
DH RISE AND FALL vs. CAPACITIVE LOAD
MAX8523toc04
DH AND DL RISE AND FALL TIMES vs. TEMPERATURE
14 RISE/FALL TIME (ns) 12 ICC (A) 10 8 6 4 2 DL RISE DL FALL 10 CDL = CDH = 3.0nF -40 -20 0 20 40 60 80 100 120 30 DH RISE DH FALL
MAX8523toc05
VCC SUPPLY CURRENT vs. SWITCHING FREQUENCY
MAX8523toc06
18 16 14 RISE/FALL TIME (ns) 12 10 8 DH FALL 6 4 2 0 0 CDH = CDL 1 2 3 4 5 6 DH RISE
16
50
40
VCC = 6.5V VCC = 5V
20
0 CAPACITANCE (nF)
0 0
VDLY = VCC 0.2 0.4 0.6 0.8 1.0 1.2
TEMPERATURE (C)
FREQUENCY (MHz)
PROPAGATION DELAY vs. TEMPERATURE
240 220 200 180 160 140 120 100 80 60 40 20 0 0 20
MAX8523toc07
PROGRAMMABLE DELAY vs. RDLY
MAX8523 toc08
30 DL_FALL DH_RISE
20
PWM_FALL DH_FALL
10
PWM_RISE DL_FALL VDLY = VCC -40 -20 0 20 40 60 80 100 120
0
DELAY (ns)
RISE (ns)
40
60
80
100
120
140
TEMPERATURE (C)
RDLY (k)
TYPICAL SWITCHING WAVEFORMS
MAX8523 toc09
PWM SIGNAL DH_ GATE VOLTAGE
2XIRF7811W HIGH-SIDE MOSFETS 2XIRF7822 LOW-SIDE MOSFETS 5V/div 100 ns
LX SWITCHING VOLTAGE
DL_ GATE VOLTAGE
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High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME BST1 DH1 LX1 PV1 DL1 PGND1 VCC DLY PWM1 PWM2 PGND2 DL2 PV2 LX2 DH2 BST2 FUNCTION Boost Flying Capacitor Connection, Phase 1. Connect a 0.22F or higher ceramic capacitor between BST1 and LX1. High-Side Gate-Driver Output, Phase 1 Switching Node (Inductor) Connection, Phase 1 Gate-Drive Supply for DL1. Bypass to PGND1 with a 2.2F or higher capacitor. Connect PV1 and PV2 together. Low-Side Gate-Driver Output, Phase 1 Power Ground for DL1. Connect PGND1 and PGND2 together. Internal analog ground is connected to PGND1. Supply Voltage. Bypass VCC to PGND1 with a 0.1F (min) capacitor. Connect a resistor from DLY to PGND1 to set dead time between DL_ falling and DH_ rising. Connect to VCC for default 20ns delay. Phase 1 PWM Logic Input. DH1 is high when PWM1 is high; DL1 is high when PWM1 is low. Phase 2 PWM Logic Input. DH2 is high when PWM2 is high; DL2 is high when PWM2 is low. Power Ground for DL2 Low-Side Gate-Driver Output, Phase 2 Gate-Drive Supply for DL2. Bypass to PGND2 with a 2.2F or higher capacitor. Connect PV1 and PV2 together. Switching Node (Inductor) Connection, Phase 2 High-Side Gate-Driver Output, Phase 2 Boost Flying Capacitor Connection, Phase 2. Connect a 0.22F or higher ceramic capacitor between BST2 and LX2.
MAX8523
Detailed Description
The MAX8523 dual-phase gate driver, along with the MAX8524/MAX8525 multiphase controllers, provides flexible 2- to 8-phase CPU core-voltage supplies. The 0.5/0.95 driver resistance allows up to 30A output current per phase. Each MOSFET driver in the MAX8523 is capable of driving 3000pF capacitive loads with only 15ns propagation delay and 11ns typical rise and fall times, allowing operations up to 1.2MHz per phase. Adaptive dead time controls low-side MOSFET turn-on, and user-programmable dead time controls high-side MOSFET turn-on. This maximizes converter efficiency, while allowing operation with a variety of MOSFETs and PWM controller ICs. A UVLO circuit allows proper power-on sequencing. PWM_ signal inputs are both TTL and CMOS compatible.
Principle of Operation
MOSFET Gate Drivers (DH_, DL_) The high-side drivers (DH_) have typical 0.8 sourcing resistance and 0.65 sinking resistance, resulting in 6A peak sourcing current and 7A peak sinking current with 5V supply voltage. The low-side drivers (DL_) have typical 0.95 sourcing resistance and 0.5 sinking resistance, yielding 5A peak sourcing current and 10A peak sinking current. This reduces switching losses, making the MAX8523 ideal for both high-frequency and highoutput-current applications. Shoot-Through Protection Adaptive shoot-through protection is incorporated for the switching transition after the high-side MOSFET is turned off and before the low-side MOSFET is turned on. The low-side driver is turned on only when the LX voltage falls below 1.8V. Furthermore, the delay time between the low-side MOSFET turn-off and high-side MOSFET turn-on can be adjusted by selecting the value of R2 (see the RDLY Selection section).
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High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
BST1
MAX8523
PWM1
DELAY LOGIC
DHON DHLO DLON DLLO
DH1 LX1 PV1 DL1 PGND1
VCC
UVLO LX1 LOW DETECT
DLY
DELAY PROGRAM
PHASE1 PHASE2 BST2 DHON DHLO DLON DLLO LX2 LOW DETECT DH2 LX2 PV2 DL2 PGND2
PGND1
PWM2
Figure 1. MAX8523 Functional Diagram
Undervoltage Lockout (UVLO)
When VCC is below the UVLO threshold (3.5V typ), DH_ and DL_ are held low. Once VCC is above the UVLO threshold and PWM_ is low, DL_ is kept high and DH_ is kept low. This prevents output from rising before a valid PWM signal is applied.
Boost Capacitor Selection
The MAX8523 uses a bootstrap circuit to generate the floating supply voltages for the high-side drivers (DH_). The selected high-side MOSFET determines appropriate boost capacitance values, according to the following equation: QGATE CBST = VBST where QGATE is the total gate charge of the high-side MOSFET and VBST is the voltage variation allowed on the high-side MOSFET drive. Choose VBST = 0.1V to 0.2V when determining the CBST. Low-ESR ceramic capacitors should be used for C3 and C4.
VCC Decoupling
VCC provides the supply voltage for the internal logical circuit. To avoid malfunctions due to the switching noise on the DH_, DL_, and LX_ pins, RC decoupling is recommended for the VCC pin. Place a 10 resistor (R1) from the supply voltage to the VCC pin and a 0.1F (C7) capacitor from the VCC pin to PGND1.
6
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High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
3V TO 13.5V
+4.5V - 6.5V C1 D1 R1 1 Q1 1.6V/20A C5 L1 C3 3 Q2 5 6 4 C2 13 8 R2 LX1 DH2 15 C4 LX2 DL2 PGND2 PWM2 PWM1 14 12 11 10 9 PWM2 CONTROL SIGNAL PWM1 CONTROL SIGNAL Q3 L2 1.6V/20A C6 2 BST1 DH1 VCC BST2 7 16 C7
MAX8523
DL1 PGND1 PV1 PV2 DLY
Q4
Figure 2. Typical Application Circuit
PV_ Decoupling
PV_ provides the supply voltages for the low-side drivers (DL_). The decoupling capacitors at PV_ also charge the BST capacitors during the time period when DL_ is high. Therefore, the decoupling capacitor C2 for PV_ should be large enough to minimize the ripple voltage during switching transitions. C2 should be chosen according to the following equation: C2 = 10 x CBST
Avoiding dV/dt-Induced Low-Side MOSFET Turn-On
At high input voltages, fast turn-on of the high-side MOSFET could momentarily turn on the low-side MOSFET due to the high dV/dt appearing at the drain of the low-side MOSFET. The high dV/dt causes a current flow through the Miller capacitance (CRSS) and the input capacitance (CISS) of the low-side MOSFET. Improper selection of the low-side MOSFET that has a high ratio of CRSS/CISS makes the problem more severe. To avoid the problem, give special attention to the ratio of C RSS /C ISS when selecting the low-side MOSFET. Adding a resistor between the BST and the CBST can slow the high-side MOSFET turn-on. Similarly, adding a capacitor from the gate to the source of the high-side MOSFET has the same effect. However, both methods are at the expense of increasing the switching losses.
RDLY Selection
Connect DLY to VCC for the default delay time, typically 20ns. Add a delay resistor, RDLY, between DLY and PGND1 to increase the delay between the low-side MOSFET drive turn-off and the high-side MOSFET turnon. See the Typical Operating Characteristics to select RDLY.
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7
High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
Table 1. Typical Component Values (250kHz Operation, 20A/Phase Output Current)
COMPONENT C1 C2 C3, C4 C5, C6 C7 D1 L1, L2 Q1, Q2 Q3, Q4 R1 R2 DESCRIPTION 5 x 330F/25V, 23m (max) ESR input filtering capacitor 2.2F/10V ceramic capacitor 0.22F/10V ceramic capacitors 3 x 820F/4V, 12m (max) ESR electrolytic capacitors 0.1F/10V ceramic capacitor Dual Schottky diode 0.66H/29A, 2.1m (typ), 2.5m (max) RDC inductors High-side MOSFETs Low-side MOSFETs 10 5% resistor (0603) 2k to 125k 1% dead-time delay programming resistor (0603) PART NUMBER Sanyo 25MV330WX Taiyo Yuden JMK107BJ225MA Taiyo Yuden GMK212BJ224MG Sanyo 4SP820M Taiyo Yuden UMK212BJ104MG Central Semiconductor CMPSH-3A Sumida CDEP134-H Siliconix SUB70N03-09BP Fairchild FDB7045L VCC decoupling resistor --
Table 2. Typical Component Values (800kHz Operation, 20A/Phase Output Current)
COMPONENT C1 C2 C3, C4 C5, C6 C7 D1 L1, L2 Q1, Q2 Q3, Q4 R1 R2 DESCRIPTION 5 x 10F/25V, 10m (max) ESR input filtering capacitor (1812) 2.2F/10V ceramic capacitor 0.22F/10V ceramic capacitors 3 x 680F/2V, 5m (max) ESR SP capacitors 0.1F/10V ceramic capacitor Dual Schottky diode 0.23H/30A, 1.1m (max) RDC inductors High-side MOSFETs Low-side MOSFETs 10 5% resistor (0603) 2k to 125k 1% dead-time delay programming resistor (0603) PART NUMBER Taiyo Yuden TMK432BJ106MM Taiyo Yuden JMK107BJ225MA Taiyo Yuden GMK212BJ224MG Sanyo 2RSTPD680M5 Taiyo Yuden UMK212BJ104MG Central Semiconductor CMPSH-3A TDK SPM12535T-R23M300 IR IRF7801 IR 2XIRF7822 VCC decoupling resistor --
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High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters
Applications Information
Power Dissipation
Power dissipation in the IC package comes mainly from switching the MOSFETs. Therefore, it is a function of both switching frequency and the total gate charge of the selected MOSFETs. The total power dissipation when both drivers are switching is given by: P IC = 2 x fS x (N x QG _ TOTAL _ HS x RHS + M x QG _ TOTAL _ LS x RHS + (RG _ HS / N) RLS ) x VPV _ + VVCC x IVCC RLS + (RG _ LS / M) where fS is the switching frequency, QG_TOTAL_HS is the total gate charge of the selected high-side MOSFET, QG_TOTAL_LS is the total gate charge of the selected low-side MOSFET, N is the total number of the high-side MOSFETs in parallel, M is the total number of the low-side MOSFETs in parallel, VPV_ is the voltage at the PV_ pin, RHS is the on-resistance of the high-side driver, RLS is the on-resistance of the low-side driver, RG_HS is the gate resistance of the selected high-side MOSFET, RG_LS is the gate resistance of the selected low-side MOSFETs, VVCC is the voltage at the VCC pin, and IVCC is the supply current at the VCC pin.
PC Board Layout Considerations
The MAX8523 MOSFET driver sources and sinks large currents to drive MOSFETs at high switching speeds. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. The following PC board layout guidelines are recommended when designing with the MAX8523: 1) Place all decoupling capacitors (C2, C3, C4, C7) as close to their respective pins as possible. 2) Minimize the high-current loops from the input capacitor, upper-switching MOSFET, and low-side MOSFET back to the input capacitor negative terminal. 3) Provide enough copper area at and around the switching MOSFETs and inductors to aid in thermal dissipation. 4) Connect the PGND1 and PGND2 pins of the MAX8523 as close as possible to the source of the low-side MOSFETs. 5) Keep LX1 and LX2 away from sensitive analog components and nodes. Place the IC and analog components on the opposite side of the board from the power-switching node if possible.
MAX8523
Pin Configuration
TOP VIEW
BST1 1 DH1 2 LX1 3 PV1 4 DL1 5 PGND1 6 VCC 7 DLY 8 16 BST2 15 DH2 14 LX2
Chip Information
TRANSISTOR COUNT: 1187 PROCESS: BiCMOS
MAX8523
13 PV2 12 DL2 11 PGND2 10 PWM2 9 PWM1
QSOP
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9
High-Speed, Dual-Phase Gate Driver for Multiphase, Step-Down Converters MAX8523
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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